The efficiency of the phase and sampling error correction in systems is tied to generation of a reference pattern signal to be used for alignment and correction.
Generating signals providing reference phases to be used for correction is not new. But, in present systems, the reference phases are generated off-chip leading to buildup of reference signal distortions.
Moreover, while duty cycle correction systems are known, and systems that correct for duty cycle distortion, such systems “measure” the distortion and correct for it.
There is a need to generate pristine patterns on-chip for use as a reference to correct for sampling errors.